1. Technical Field
The embodiment of the invention relates generally to memory management and particularly to dynamically adjusting read data return sizes based on memory interface bus utilization to optimize read data traffic on a memory interface bus.
2. Description of the Related Art
A memory controller handles memory requests received on a memory channel from one or more cores. The memory controller schedules the use of bandwidth on a memory bus for passing the memory requests to one or more memory devices and receiving responses to the memory requests. Memory requests include read requests, for reading data from the one or more memory devices, and write requests, for writing data to the one or more memory devices.